Taiwan’s MediaTek says it supports both TSMC and Intel’s advanced packaging technologies

By Wen-Yee Lee TAIPEI, May 29 (Reuters) – Taiwan chip designer MediaTek said on Friday it supports both TSMC’s and Intel’s โ€Œadvanced packaging technologies, allowing customers to choose between the โ€Œtwo approaches. “We’re one of the few custom silicon providers that support both (TSMC’s) CoWoS โ€‹and (Intel’s) EMIB. We let our customers choose,” MediaTek Senior…


Taiwan’s MediaTek says it supports both TSMC and Intel’s advanced packaging technologies

By Wen-Yee Lee

TAIPEI, May 29 (Reuters) – Taiwan chip designer MediaTek said on Friday it supports both TSMC’s and Intel’s โ€Œadvanced packaging technologies, allowing customers to choose between the โ€Œtwo approaches.

“We’re one of the few custom silicon providers that support both (TSMC’s) CoWoS โ€‹and (Intel’s) EMIB. We let our customers choose,” MediaTek Senior Vice President Vince Hu told reporters in Taipei.

CoWoS, or Chip-on-Wafer-on-Substrate, is TSMC’s advanced packaging technology widely used for artificial intelligence chips, including those designed โ€Œby Nvidia. EMIB, โ or Embedded Multi-die Interconnect Bridge, is Intel’s competing advanced packaging technology.

Intelโ€™s EMIB advanced packaging technology is being โ considered for custom AI chips MediaTek is designing for Alphabetโ€™s Google, according to two people familiar with the matter.

MediaTek has not publicly โ€‹identified Google โ€‹as a customer for its โ€‹custom chip business and did โ€Œnot comment on whether it may use EMIB technology for chips for Google.

MediaTek, which has been expanding its custom AI chip business beyond its traditional mobile chip operations, reiterated that it had doubled its forecast for 2026 data center sector revenue to $2 โ€Œbillion.

The company estimates the total addressable โ€‹market (TAM) for custom AI Application-Specific Integrated Circuits โ€‹could reach $70 billion to $80 โ€‹billion in 2027 and it targets a 10% โ€Œto 15% share of that market.

MediaTek โ€‹also said it โ€‹has multiple test chips on TSMC’s A14 process, the chipmaker’s next-generation manufacturing technology expected to enter volume production in โ€‹2028.

The company also โ€Œsaid it plans to use TSMC’s Arizona fabs, including for โ€‹chips manufactured on 4-nanometre and 3-nanometre technologies.

(Reporting by Wen-Yee โ€‹Lee; Editing by Susan Fenton)

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